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IMPORTANT! ALL VME INTERFACE FEATURES ARE INDEPENDENTLY SELECTABLE FOR EACH INTERFACE ON THE BOARD. This allows the Dual E board to be a true 2-for-1 replacement. When operating in Master mode the Dual E board can fetch instructions and data from remote VME memory via reads performed across the VMEbus. For example, NTDS output buffers can be read from remote memory, stored on-board in internal DSP memory (or in RAM) and transmitted as required via the NTDS transmitter. The Dual E board can also write data, such as NTDS input buffers to remote VME memory via VMEbus writes. A VME Read Modify Write (RMW) operation is also supported in Master mode (clearing and setting of semaphores is performed as a single cycle operation). For users who prefer to control VMEbus access via a remote Bus Master, the Dual E board can operate in VME Slave mode and as a Slave is capable of supporting data word sizes of 16, 32 and 64 bits. The VME Slave function responds to both standard 32 bit Block Transfer (BLT) and 64 bit Block Transfer (MBLT) address modifiers. VME64 Block Mode transfers are supported in both Master and Slave mode. In Master mode, the user is allowed to define the VME block size as 8, 16 or 32 words. These block sizes promote efficient use of each VMEbus acquisition while preventing starvation of other devices on the bus. If VME64 block mode transfer is selected in Master mode, the VME I/F processor automatically performs boundary alignment, off-loading this task from the user. In Slave mode, the Dual E supports any block size that has been selected by the controlling remote Bus Master. All combinations of A24/A32/ Privileged/Supervisory/Data/ and Program address modification codes are selectable both as Bus Master and as Slave. The Jentech high speed VMEbus controller provides faster data rates, fast VME block mode transfers and efficient use of VME bandwidth. Whether operating in Master or Slave mode, the Dual E board is capable of quickly initiating and sustaining high data transfer rates on the VMEbus. High data rates are particularly important in a system where multiple NTDS interfaces share the bus along with other devices. The sporadic nature of NTDS transmissions makes planning for worst-case loads necessary to avoid VME timeout situations. Because the Dual E board is capable of quickly initiating and sustaining high data transfer rates, it can offset with speed any additional bandwidth used by multiple interfaces. In addition, each time the high speed bus controller acquires the VMEbus, all data which is ready for transmission from either interface is transmitted during the same bus acquisition cycle regardless of which interface initiated the original bus request. In this way the most efficient use is made of each bus acquisition and neither interface suffers any additional delay. The use of low voltage (3.3v) and ultra-low voltage (2.5v) components allows the Dual E board to be clocked at much higher rates, producing the high performance needed to support two interfaces while still maintaining low power consumption, low noise and minimal heat dissipation and cooling requirements. Sample VMEbus data rates for the Dual E board are listed below. The following benchmarks were gathered using Motorola MVME167 CPU:
Eight independent VME DMA I/O channels minimize any latency in NTDS buffer transfers across the VMEbus and have been implemented in a manner similar to that used by the UYK family of military computers. These eight independent DMA channels are divided evenly between the two NTDS interfaces on the board and are assigned one each to NTDS input buffers, output buffers, EI buffers and EF buffers. For example, as words are received over the NTDS interface into an active input buffer, they are combined into groups of 1, 8, 16 or 32 words depending on user selection of single word or block mode transfer. When the indicated number of words are received, they are immediately written to remote memory via DMA transfer. The remote CPU is not involved and all other on-board resources continue processing uninterrupted. This allows input, output, EI and EF buffers to be transmitted as soon as they are ready and avoids blocking by any other transmit or receive operation that may be currently ongoing. The Dual E board operates in a similar manner for NTDS output. The DMA channels are prioritized with EF/EI channels having precedence over input and output channels. |
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